Division and Square Root

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This book is aimed at researchers and designers focused on division, square root, and related operations, particularly in the context of arithmetic units for general-purpose processors or specialized components for applications like signal and image processing. It is also suitable for graduate courses on arithmetic algorithms and processors. As integrated circuit technology advances, the hardware implementation of basic arithmetic operations is increasingly common in processor design. While the design of efficient adders and multipliers is well-established, division and square root present significant challenges due to the interdependence of iteration steps and the complexity of result-digit generation. To mitigate these challenges, a comprehensive theory has emerged, incorporating concepts such as redundant number representations, result digit prediction, and operand scaling. The authors provide a unified overview of this theory, which serves as a foundation for specific implementations and further research. The book integrates extensive research, drawing on the work of numerous researchers alongside the authors' contributions. It includes a comprehensive bibliography and bibliographical notes at the end of each chapter, making it a valuable resource for both practitioners and scholars in the field.